There are many steps that need to be followed in order to use your DAQNI card. This document explains the procedure.
1. Verify proper installation of your DAQ card. The best way to do this is to bring up the Measurement & Automation Wizard. Click on the Devices and Interfaces folder. Right-click on your device and select Properties. A window should appear like the following: 
Left-click on the Test Resources button. If the device is working properly, a dialog box will appear like this one:
If there are resource conflicts, fix them before proceeding. Finally, left-click on the Run Test Panels button. This verifies that your card can enter and output data. An example of the window is:
Once everything has been checked and verified, the card is now ready to use with HTBasic.
- In order to use the DAQ card with HTBasic, the device number from the NI software is needed. Start up the Measurement & Automation Wizard and Select Devices and Interfaces. The device number can be found in parenthesis next to the name of the device. Here is an example:
An example of Digital Input/Output will be given to give a better feel of how to use the file. EXAMPLE To use the DAQ card for Digital Input/Output, it is necessary to use register 1803. This example will best be understood if you follow along in the daqni.rtf file. Go to the section with the heading 1803—Digital Input/Output. As you can see, there are sub-register numbers underneath the main heading. Each register allows you to control a different aspect of your input/output. All of these registers are used with the CONTROL command.
CONTROL 1803,0;1
This statement can be understood as follows: 1803 signifies it is a Digital Input/Output register, 0 indicates it is sub-register 0, and the 1 after the semicolon means that all the Digital Input/Output registers are reset. Every CONTROL statement is similar to the one above. The first 4 numbers are the register, the comma followed by a number is the sub-register, and the semicolon followed by a number is the value sent to that register.
Here is an example of a program that outputs digital data.All programs will follow this same format. You setup your card with CONTROL statements and then do simple ENTER and OUTPUT calls. All the information you need on each register is found in the daqni.rtf file. Some subregisters refer to NI function calls. These functions can be found either in this document or in the NI-DAQ Function Reference Manual which should have come with your card.10 CONTROL 1803,0;1
20 CONTROL 1803,10;0,0,0,1,2
30 INTEGER X
40 INTEGER Y
50 X=1
60 FOR X=15 TO 0 STEP -1
70 OUTPUT 18030000;X;
80 WAIT .2
90 NEXT X
100 ENDLine 10: Writing a 1 to register 0 resets all the digital input/output registers.
Line 20: This line writes values to multiple registers. It starts with register 10. The first value after the semicolon is written to register 10. The next value is sent to register 11. The next to register 12 and so on. By looking in the daqni.rtf document, you can see what each register is. This port can be changed to inputs by modifying the values sent to the registers in this line.
Line 70: This is the OUTPUT statement to the digital port. 1803 means it is a digital output. The 0000 after 1803 means output to group 0 and port 0. The group is listed first. Every output value must be followed by a semicolon in order for the line to hold the value. If it is not included, the output line will only hold the value for about 100 microseconds.
Format
status = DIG_Line_Config (deviceNumber, port, line, dir)
Purpose
Configures a specific line on a port for direction (input or output).
Input Parameter
Name |
Type |
Description |
deviceNumber |
i16 |
Assigned by configuration utility |
port |
i16 |
digital I/O port number |
line |
i16 |
digital line |
dir |
i16 |
direction, input, or output |
Parameter Discussion
port is the digital I/O port number.
Range: 0 for the E Series devices.
0 through 1 for the PC-TIO-10.
0 through 3 for the DIO 6533 (DIO-32HS) and the VXI-AO-48XDC.
0 through 15 for the VXI-DIO-128.
0 for the PCI-4451 and PCI-4452.
0 through 3 for the PCI-4551 and PCI-4552.
0 for the 671X and 6704 devices.
line is the digital line for which to configure.
Range: 0 through 7.
dir indicates the direction, input or output, to which the line is to be configured.
0: Line is configured as an input line (default).
1: Line is configured as an output line.
3: Line is configured as an output line with a wired-OR (open collector) driver (DIO 6533 only).
Using This Function
With this function, a PC-TIO-10, DIO 6533, VXI-AO-48XDC, E Series, or DSA port can have any combination of input and output lines. Use DIG_Prt_Config to set all lines on the port to be either all input or all output lines.
Format
status = DIG_Prt_Config (deviceNumber, port, mode, dir)
Purpose
Configures the specified port for direction (input or output). DIG_Prt_Config also sets the handshake mode for the DIO-24, 6025E devices, AT-MIO-16DE-10, DIO-96, and Lab and 1200 Series devices.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
port |
i16 |
digital I/O port number |
mode |
i16 |
handshake mode |
dir |
i16 |
direction, input, or output |
Parameter Discussion
port is the digital I/O port number.
Range:
0 or 1 for the AT-AO-6/10, DAQCard-500/700, PC-TIO-10, PC-OPDIO-16, 516 devices, AO-2DC, and LPM devices.
0 for the E Series devices, except the AT-MIO-16DE-10 and 6025E devices.
0 through 2 for the DIO-24 and Lab and 1200 Series devices.
0 through 3 for the DIO-32F and DIO 6533 (DIO-32HS).
0 and 2 through 4 for the AT-MIO-16DE-10 and 6025E devices.
0 through 3 for the VXI-AO-48XDC.
0 through 11 for the DIO-96.
0 through 15 for the VXI-DIO-128.
0 for the PCI-4451 and PCI-4452.
0 through 3 for the PCI-4551 and PCI-4552.
0 for the 671X and 6704 devices.
mode indicates the handshake mode that the port uses.
0: Port is configured for no-handshaking (nonlatched) mode. You must use mode = 0 for all other ports and boards. You can use the DIO-32F and DIO 6533 (DIO-32HS) for handshaking, but only through the group calls (see DIG_Grp_Config).
1: Port is configured for handshaking (latched) mode. mode = 1 is valid only for ports 0 and 1 of the DIO-24 and Lab and 1200 Series devices; for ports 2 and 3 of the 6025E devices and AT-MIO-16DE-10; and for ports 0, 1, 3, 4, 6, 7, 9, and 10 of the DIO-96.
dir indicates the direction, input or output, to which the port is to be configured.
Range:
0 through 3.
0: Port is configured as an input port (default).
1: Port is configured as a standard output port.
2: Port is configured as a bidirectional port.
3: Port is configured as an output port, with wired-OR (open collector) output drivers.
Note mode must be set to handshaking in order to use bidirectional.
The following ports can be configured as bidirectional:
Device |
Ports |
AT-MIO-16D |
2 |
AT-MIO-16DE-10 |
2 |
Lab and 1200 Series devices |
0 |
DIO-24 |
0 |
DIO-96 |
0,3,6, and 9 |
Note: The only ports that can be configured as wired-OR output ports are DIO 6533 ports 0 through 3.
Using This Function
DIG_Prt_Config configures the specified port according to the specified direction and handshake mode. Any configurations not supported by or invalid for the specified port return an error, and NI-DAQ does not change the port configuration. Information about the valid configuration of any digital I/O port is in the DAQ Hardware Overview Guide, and Chapter 3, Software Overview, of the NI-DAQ User Manual for PC Compatibles.
For the DIO-24, DIO-32F, DIO 6533, DIO-96, and Lab and 1200 Series devices, DIG_Prt_Config returns an error if the specified port has been assigned to a group by a previous call to DIG_Grp_Config or DIG_SCAN_Setup. DIG_Prt_Config also returns an error for the DIO-32F and DIO 6533 if the specified port is port 4.
After system startup, the digital I/O ports on all the boards supported by this function are configured as follows:
dir = 0: Input port.
mode = 0: No-handshaking mode.
Also, ports on the DIO-24, DIO-32F, DIO 6533, DIO-96, and Lab and 1200 Series devices are not assigned to any group. If this is not the digital I/O configuration you want, you must call DIG_Prt_Config to change the port configuration. You must call DIG_Grp_Config instead to use handshaking modes on the DIO-32F and DIO 6533.
Note: 6025E devices, AT-MIO-16DE-10, Lab and 1200 Series, PC-AO-2DC, PC-DIO-24/PnP, and DIO-96 users—Because of the design of the Intel 8255 chip, calling this function on one port will reset the output states of lines on other ports on the same 8255 chip. The other ports will remain in the same configuration; input ports are not affected. Therefore, you should configure all ports before outputting data.
Note: If you have connected one or more AMUX-64T boards or an SCXI chassis module to your MIO or AI device, DIG_Prt_Config returns a badPortError if called with port equal to 0.
Configure_HW_Analog_TriggerFormat
status = Configure_HW_Analog_Trigger (deviceNumber, onOrOff, lowValue, highValue, mode, trigSource)
Purpose
Configures the hardware analog trigger. The hardware analog triggering circuitry produces a digital trigger that you can use for any of the signals available through the Select_Signal function by selecting source = ND_PFI_0).
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
onOrOff |
u32 |
turns the analog trigger on or off |
low Value |
i32 |
specifies the low level used for analog triggering |
high Value |
i32 |
specifies the high level used for analog triggering |
mode |
u32 |
the way the triggers are generated |
trigSource |
u32 |
the source of the signal used for triggering |
Parameter Discussion
Legal ranges for the onOrOff, mode, and trigSource parameters are given in terms of constants that are defined in a header file. The header file you should use depends on which of the following languages you are using:
C programmers—NIDAQCNS.H (DATAACQ.H for LabWindows/CVI)
BASIC programmers—NIDAQCNS.INC (Visual Basic for Windows programmers should refer to the Programming Language Considerations section in Chapter 1, Using the NI-DAQ Functions, for more information.)
Pascal programmers—NIDAQCNS.PAS onOrOff informs NI-DAQ whether you want to turn the analog trigger on or off. Legal values for this parameter are ND_ON and ND_OFF.
lowValue and highValue specify the levels you want to use for triggering. For E Series devices, the legal range for the two values is 0 to 255 (0–4,095 for 16-bit boards). In addition, lowValue must be less than highValue. The voltage levels corresponding to lowValue and highValue are as follows:
When trigSource = ND_PFI_0, 0 corresponds to –10 V and 255 (4,095 for the 16-bit boards) corresponds to +10 V; values between 0 and 255 (4,095 for 16-bit boards) are distributed evenly between –10 V and +10 V. You can use ND_PFI_0 as the analog signal you are triggering off of at the same time you designate ND_PFI_0 as a source for a Select_Signal signal.
When trigSource = ND_THE_AI_CHANNEL and the channel is in bipolar mode, 0 corresponds to –5 V, 255 corresponds to +5 V; values between 0 and 255 are evenly distributed between –5 V and +5 V. For 61XX devices, 0 corresponds to –10 V, 255 corresponds to 10 V. (For the 16-bit boards: 0 corresponds to –10 V, 4,095 corresponds to +10 V, and values between 0 and 4,095 are evenly distributed between –10 V and +10 V.)
When trigSource = ND_THE_AI_CHANNEL and the channel is in unipolar mode, 0 corresponds to 0 V, 255 (4,095 for the 16-bit boards) corresponds to +10 V; values between 0 and 255 (4,095 for the 16-bit boards) are evenly distributed between 0 V and +10 V.
See the end of this section for an example calculation for lowValue.
For DSA devices, the legal range for lowValue and highValue is –65,536 to +65,535. These values correspond to the lower limit of the voltage range to the higher limit of the voltage range for the current configuration of the trigger channel. For example, when the channel is configured for 0 dB of gain, –65,536 corresponds to –10 V and +65, 535 corresponds to +10 V.
mode tells NI-DAQ how you want analog triggers to be converted into digital triggers that the onboard hardware can use for timing.
Note: The PCI-6110E and PCI-6111E can use any of the analog input channels for the trigSource. For these devices set trigSource to the channel number you want, instead of the constant ND_THE_AI_CHANNEL.
Note: This also applies to the PCI-445X and PCI-455X devices.
The following paragraphs show all of the available modes and illustrations of corresponding trigger generation scenarios. Values specified by highValue and lowValue are represented using dashed lines, and the signal used for triggering is represented using a solid line.
ND_BELOW_LOW_LEVEL—The trigger is generated when the signal value is less than the lowValue. highValue is unused.
ND_ABOVE_HIGH_LEVEL—The trigger is generated when the signal value is greater than the highValue. lowValue is unused.
ND_INSIDE_REGION—The trigger is generated when the signal value is between the lowValue and the highValue.
ND_HIGH_HYSTERESIS—The trigger is generated when the signal value is greater than the highValue, with hysteresis specified by lowValue.
ND_LOW_HYSTERESIS—The trigger is generated when the signal value is less than the lowValue, with hysteresis specified by highValue.
Use the trigSource parameter to specify the source of the trigger you want to use. For E Series devices, the legal values are ND_PFI_0 and ND_THE_AI_CHANNEL.
Set trigSource to ND_PFI_0 if you want the trigger to come from the PFI0/TRIG1 pin. You need to connect the analog signal you want to use for triggering to the PFI0/TRIG1 pin. To generate triggers based on an analog signal that takes a wide range of values between –10 V and +10 V, you should use this setting.
You should select ND_THE_AI_CHANNEL for trigSource only to generate triggers based on a low-range analog signal, if you are concerned about signal quality and are using a shielded cable, or if you want the trigger to be based on an analog input channel in the differential mode. Using this selection is non-trivial.
If you set trigSource to ND_THE_AI_CHANNEL, you can use the signal connected to one of the analog input pins for triggering. In this case, the signal is amplified on the device before it is used for trigger generation. You can use this source selection under the following conditions:
- You want to perform data acquisition from a single analog input channel (the DAQ family of functions). You only can use the channel you are acquiring from for analog triggering.
- You want to perform data acquisition from more than one analog input channel (a combination of the DAQ and SCAN families of functions). The only analog input channel you can use as the start trigger is the first channel from your list of channels. You cannot use this form of the analog trigger for the stop trigger in case of pretriggered data acquisition.
Note: The PCI-6110E and PCI-6111E can use any analog input channel.
- You do not want to perform any analog input operations (the AI, DAQ, and SCAN families f functions). You must use AI_Setup to select the analog input channel you want to use and the gain of the instrumentation amplifier. You also can use AI_Configure to alter the configuration of the analog input channel.
- You want to use AI_Check, and you want to use the analog trigger for conversion timing. You do not have to perform any special steps.
The reason for using these constraints is that if you are scanning among several analog input channels, signals from those channels are multiplexed in time, and the analog triggering circuitry is unable to distinguish between signals from individual channels in this case.
For DSA devices only, any of the analog input channels can be the source of the analog trigger, even channels that are not part of the channel list set in DAQ_Start or SCAN_Setup. Set trigSource to the channel number of the channel to monitor for the analog trigger.
Using This Function
When you use this function, you activate the onboard analog triggering hardware. This onboard hardware generates a digital trigger that the DAQ-STC then uses for timing and control. To use the analog trigger, you need to use this function and the Select_Signal function. To use analog triggering, use as much hysteresis as your application allows because the circuitry used for this purpose is very noise-sensitive.
When you use Select_Signal for E series devices, set source to ND_PFI_0 for your signal and sourceSpec as appropriate. Notice that the two polarity selections give you timing control in addition to the five triggering modes listed here. For DSA devices, when you use Select_Signal, set source to ND_ATC_OUT for your signal and sourceSpec to ND_DONT_CARE. NI-DAQ, which will route the analog trigger circuit output as appropriate for the device.
For example, if you set source to ND_THE_AI_CHANNEL, the channel you are interested in is in bipolar mode, you want a gain of 100, and you want to set the voltage window for triggering to +35 mV and +45 mV for your original signal (that is, signal before amplification by the onboard amplifier), you should make the following programming sequence:
12-bit boards:
status = Configure_HW_Analog_Trigger (deviceNumber, ND_ON, 218, 243, mode, ND_THE_AI_CHANNEL)
status = Select_Signal (deviceNumber, ND_IN_START_TRIGGER, ND_PFI_0, ND_LOW_TO_HIGH)
16-bit boards:
status = Configure_HW_Analog_Trigger (deviceNumber, ND_ON, 2764, 2969, mode, ND_THE_AI_CHANNEL)
status = Select_Signal (deviceNumber, ND_IN_START_TRIGGER, ND_PFI_0, ND_LOW_TO_HIGH)
To calculate lowValue in the previous example, do the following:
1. Multiply 35 mV by 100 to adjust for the gain to get 3.5 V.
2. Use the following formula to map the 3.5 V from the –5 V to +5 V scale to a value on the 0 to 255 (0–4,095 for the 16-bit boards) scale:value = (3.5/5 + 1) * 128 = 218 (for the 0 to 255 case)
Use the following formula to map the 3.5 V from the –10 V to +10 V scale to a value on the 0 to 4,095 scale:
value = (3.5/10 +1) * 2,048 = 2,764 (for the 0 to 4,095 case)
In general, the scaling formulas are as follows:
For an analog input channel in the bipolar mode:
For an analog input channel in the unipolar mode:12-bit boards: value = (voltage/5 + 1) *128
16-bit boards: value = (voltage/10 + 1) *204812-bit boards: value = (voltage/10) *256
16-bit boards: value = (voltage/10) *4096For the PFI0/TRIG1 pin:
12-bit boards: value = (voltage/10 + 1)*128
16-bit boards: value = (voltage/10 + 1) * 2048
If you apply any of the formulas and get a value equal to 256, use the value 255 instead; if you get 4,096 with the 16-bit boards, use 4,095 instead.
You can use the following programming sequence to set up an acquisition to be triggered using the hardware analog trigger, where the trigger source is the PFI0/TRIG1 pin:
status = Configure_HW_Analog_Trigger (deviceNumber, ND_ON, lowValue, highValue, mode, ND_PFI_0)
status = Select_Signal (deviceNumber, ND_IN_START_TRIGGER, ND_PFI_0, ND_LOW_TO_HIGH)
Format
status = Timeout_Config (deviceNumber, timeout)
PurposeEstablishes a timeout limit that is used by the synchronous functions to ensure that these functions eventually return control to your application. Examples of synchronous functions are DAQ_Op, DAQ_DB_Transfer and WFM_from_Disk.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
timeout |
i32 |
number of timer ticks |
Parameter Discussion
timeout is the number of timer ticks. The duration of a tick is 55 ms (0.055 s), and there are approximately 18 ticks/s.
–1: Wait indefinitely (timeout disabled).
0 to 2 31 : Wait timeout * 0.055 s before returning.
Using This Function
The synchronous functions do not return control to your application until they have accomplished their task. If you have indicated a large amount of data and/or a slow acquisition or generation rate, you might want to terminate the function prematurely, short of restarting your computer. By calling Timeout_Config before calling the synchronous function, you can set an upper bound on the amount of time the synchronous function takes before returning. If the synchronous function returns the error code timeOutError, you know that the number of ticks indicated in the timeout parameter have elapsed and the synchronous function has returned because of the timeout.
The following is a list of the synchronous functions:
DIG_DB_Transfer
DAQ_DB_Transfer
Lab_ISCAN_Op
WFM_DB_Transfer
DAQ_Op
Lab_ISCAN_to_Disk
WFM_from_Disk
DAQ_to_Disk
SCAN_Op
WFM_Op
SCAN_to_Disk
Format
status = DIG_Grp_Config (deviceNumber, group, groupSize, port, dir)
Purpose
Configures the specified group for port assignment, direction (input or output), and size.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
group |
i16 |
group |
groupSize |
i16 |
size of the group |
port |
i16 |
digital I/O port assigned to the group |
dir |
i16 |
input or output |
Parameter Discussion
group is the group to be configured.
Range:
1 or 2 for the DIO 6533 devices and the AT-DIO-32F.
groupSize indicates the size of the group. The following values are permitted for
groupSize:
0: Unassign any ports previously assigned to group.
1: One port assigned (8-bit group) to group.
2: Two ports assigned (16-bit group) to group.
4: Four ports assigned (32-bit group) to group.
Note: For the DIO-32F, you must use port = 0 or 1 if group = 1, and port = 2 or 3 if group = 2.
Note: For the DIO-32F, block operations are not allowed for groups of size = 1. For the DIO 6533 (DIO-32HS), you can use block operations for groups of size = 1 if you set group = 1 and port = 0, or group = 2 and port = 2.
port indicates the digital I/O port or ports assigned to the group. The assignments made depend on the values of port and of groupSize:
groupSize = 1
port = 0 assigns port 0 (A).
port = 1 assigns port 1 (B).
port = 2 assigns port 2 (C).
port = 3 assigns port 3 (D).
groupSize = 2
port = 0 assigns ports 0 and 1 (A and B).
port = 2 assigns ports 2 and 3 (C and D).
groupSize = 4
port = 0 assigns ports 0, 1, 2, and 3 (A, B, C, and D).
dir indicates the direction, input, or output for which the group is to be configured.
0: port is configured as an input port (default).
1: port is configured as an output port.
3: port is configured as an input port with request-edge latching disabled.
4: port is configured as an output port with request-edge latching enabled.
Using This Function
DIG_Grp_Config configures the specified group according to the port assignment and direction. If groupSize = 0, NI-DAQ releases any ports assigned to the group specified by group and clears the group handshake circuitry. If groupSize = 1, 2, or 4, NI-DAQ assigns the specified ports to the group and configures the ports for the specified direction. NI-DAQ subsequently writes to or reads from ports assigned to a group using the DIG_In_Grp and DIG_Out_Grp or the DIG_Block_In and DIG_Block_Out functions. NI-DAQ can no longer access any ports assigned to a group through any of the nongroup calls listed previously. Only the DIG_Block calls can use a group of size 4.
If you are using an AT-DIO-32F and intend to perform block I/O, you are limited to group sizes of 2 and 4. If you are using a DIO 6533 (DIO-32HS) and intend to perform block I/O, you also can use a group size of 1. After system startup, no ports are assigned to groups. See your hardware user manual for information about group handshake timing.
Format
status = DIG_SCAN_Setup (deviceNumber, group, groupSize, portList, dir)
Purpose
Configures the specified group for port assignment, direction (input or output), and size.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
group |
i16 |
group to be configured |
groupSize |
i16 |
number of 8-bit ports |
portList |
[i16] |
List of ports |
dir |
i16 |
direction, input, or output |
Parameter Discussion
group is the group to be configured.
Range:
1 or 2 for most devices.
1 through 8 for the DIO-96.
groupSize selects the number of 8-bit ports in the group.
Range: 0 through 2 for most devices.
0 through 8 for the DIO-96.
Note: Zero is to unassign any ports previously assigned to group.
portList is the list of ports in group. The order of the ports in the list determines how NI-DAQ interleaves data in your buffer when you call DIG_Block_In or DIG_Block_Out. The last port in the list determines the port whose handshaking signal lines NI-DAQ uses to communicate with the external device and to generate hardware interrupt.
Range:
0 or 1 for most devices.
2 or 3 for the AT-MIO-16DE-10 and 6025E devices.
0, 1, 3, 4, 6, 7, 9, or 10 for the DIO-96.
dir selects the direction, input or output, to which the group is to be configured.
0: Port is configured as an input port (default).
1: Port is configured as an output port.
2: Port is configured as a bidirectional port.
The following ports can be configured as bidirectional:
Device |
Ports |
AT-MIO-16D |
2 |
AT-MIO-16DE-10 |
2 |
Lab and 1200 Series devices |
0 |
DIO-24 |
0 |
DIO-96 |
9 |
Using This FunctionDIG_SCAN_Setup configures the specified group according to the specified port assignment and direction. If groupSize is 0, NI-DAQ releases any ports previously assigned to group. Any configurations not supported by or invalid for the specified group return an error, and NI-DAQ does not change the group configuration. NI-DAQ subsequently writes to or reads from ports assigned to a group as a group using DIG_Block_In and DIG_Block_Out. NI-DAQ can no longer access any ports assigned to a group through any of the non-group calls listed previously.
Because each port on the DIO-24, 6025E devices, AT-MIO-16DE-10, and Lab and 1200 Series devices has its own handshaking circuitry, extra wiring might be necessary to make data transfer of a group with more than one port reliable. If the group has only one port, no extra wiring is needed.
Each input port has a different Strobe Input (STB*) control signal.
PC4 on the I/O connector is for port 0.
PC2 on the I/O connector is for port 1.
Each input port also has a different Input Buffer Full (IBF) control signal.
PC5 on the I/O connector is for port 0.
PC1 on the I/O connector is for port 1.
Each output port has a different Output Buffer Full (OBF*) control signal.
PC7 on the I/O connector is for port 0.
PC1 on the I/O connector is for port 1.
Each output port also has a different Acknowledge Input (ACK*) control signal.
PC6 on the I/O connector is for port 0.
PC2 on the I/O connector is for port 1.
On the DIO-96 I/O connector, you can find four different sets of PC pins. They are APC, BPC, CPC, and DPC. APC pins correspond to port 0 and port 1, BPC pins correspond to port 3 and port 4, CPC pins correspond to port 6 and port 7, and DPC pins correspond to port 9 and port 10. For example, CPC7 is the OBF control signal for port 6 and CPC1 is the OBF for port 7 if both ports are configured as handshaking output ports.
If a group of ports is configured as input, you need to tie all the corresponding STB* together and connect them to the appropriate handshaking signal of the external device. You should connect only the IBF of the last port on portList to the external device. No connection is needed for the IBF of the other port on portList.
If a group of ports is configured as output, you should not make any connection on the control signals except those for the last port on portList. You should make the connection with the external device as if only the last port on portList is in the group. No connection is needed for any other port on the list.
For DIO-24 users, the correct W1 jumper setting is required to allow DIG_Block_In and DIG_Block_Out to function properly. If port 0 is configured as a handshaking output port, set jumper W1 to PC4; otherwise, set the jumper to PC6. However, if port 0 is configured as bidirectional, set the jumper to PC2.
Also, if port 0 is configured as bidirectional on a PC-DIO-24, port 1 will not be available. Formatstatus = WFM_Scale (deviceNumber, chan, count, gain, voltArray, binArray)
PurposeTranslates an array of floating-point values that represent voltages into an array of binary values that produce those voltages when NI-DAQ writes the binary array to one of the board DACs. This function uses the current analog output configuration settings to perform the conversions.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
chan |
i16 |
analog output channel |
count |
u32 |
number of points in buffer |
gain |
f64 |
multiplier applied as the translation is performed |
voltarray |
[f64] |
input double-precision values |
Output Parameters
Name |
Type |
Description |
binArray |
[i16] |
binary values converted from the voltages |
Parameter Discussion
chan indicates to which analog output channel the binary array is to be assigned.
Range: 0 or 1 for most devices.
0 through 5 for AT-AO-6.
0 through 9 for AT-AO-10.
0 through 3 for PCI-6711.
0 through 7 for PCI-6713.
count is the number of points in your buffer.
Range:
1 through 32.
gain is a multiplier applied to the array as NI-DAQ performs the translation. If the result of multiplying each element in the array by the value of gain produces a voltage that is out of range, NI-DAQ sets the voltage to the maximum or minimum value and returns an error. NI-DAQ still completes the translation, however.
Range:
Any real number that produces a voltage within the analog output range.
voltArray is the input array of double-precision values that represents the voltages NI-DAQ is to produce at one of the outputs.
Range:
Any real number that produces a voltage within the analog output range.
binArray is the array of binary values converted from the voltages contained in voltArray. The values in binArray produce the original voltages when NI-DAQ writes them to a DAC on your device. Refer to Appendix B, Analog Input Channel, Gain Settings, and Voltage Calculation, for the calculation of binary value.
Using This Function
WFM_Scale calculates each binary value using the following formulas:
Unipolar configuration:
12-bit DACs: binVal = voltage * (gain * (4,096/outputRange)).
16-bit DACs: binVal = voltage * (gain * (65,536/outputRange)).Bipolar configuration:
12-bit DACs: binVal = voltage * (gain * (2,048/outputRange)).
16-bit DACs: binVal = voltage * (gain * (32,768/outputRange)).
18-bit DACs: binVal = voltage * (gain * (131,072/outputRange)).
The DSA devices use 32-bit data buffers. If you are using C or Delphi, you need to typecast your i32 array to i16 when you call WFM_Scale. If you are using Visual Basic, you should use the nidaqr32.bas file (instead of nidaq32.bas) to relax type checking on binArray. Each 18-bit binVal is shifted into the upper 18 bits of the array element.
Format
status = WFM_Op (deviceNumber, numChans, chanVect, buffer, count, iterations, rate)
PurposeAssigns a waveform buffer to one or more analog output channels, selects the rate and the number of times the data in the buffer is to be generated, and starts the generation. If the number of buffer generations is finite, WFM_Op waits for completion before returning, unless you call Timeout_Config.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
numChans |
i16 |
number of analog output channels |
chanVect |
[i16] |
channel numbers |
buffer |
[i16] |
values that are coverted to voltages by DACs |
count |
u32 |
number of points in the buffer |
iterations |
u32 |
number of times the waveform generation steps through buffer |
rate |
f64 |
desired rate in pt/s |
Parameter Discussion
numChans indicates the number of analog output channels specified in the array chanVect.
chanVect is the array of channel numbers indicating which analog output channels are to receive output data from the buffer.
Channel number range:
0 or 1 for most devices.
0 through 5 for AT-AO-6.
0 through 9 for AT-AO-10.
0 through 3 for PCI-6711.
0 through 7 for PCI-6713.
buffer is an array of integer values that DACs convert to voltages. If your device has 12-bit DACs, data ranges from 0 to 4,095 in unipolar mode and from –2,048 to 2,047 in bipolar from –32,768 to +32,767 in bipolar mode. The DSA devices have 18-bit DACs and operate in bipolar mode only. Data ranges from –131,072 to +131,071. For DSA devices each buffer element is 32 bits wide. Each data point goes in the upper 18 bits of its buffer element. You should set the lower bits to zero.
count is the number of points in your buffer. When NI-DAQ is using interleaved waveform generation, count should be a multiple of numChans and not less than 2 * numChans.
Range:
1 through 2 32 – 1 (except E Series devices).
2 through 2 24 (E Series and 671X devices).
On PCI-61XX and 671X devices, the buffer must contain an even number of samples because of the 32-bit FIFO.
iterations is the number of times the waveform generation steps through buffer. A value of 0 means that waveform generation proceeds indefinitely.
Range: 0 through 2 32 – 1.
rate is the rate of waveform generation you want in points per second (pts/s). A value of 0.0 for rate means that external update pulses (applied to EXTUPDATE for the AT-AO-6/10 and Lab and 1200 Series analog output devices, and to PFI Pin 5 on E Series and 671X devices) will determine the waveform generation rate.
Range:
0.0 for external update or approximately 0.0015 to 500,000 pts/s.
Your maximum rate depends on your device type and your computer system. If the number of points that represents represent one cycle of the waveform equals count, the frequency of the generated waveform is related to the rate by this the following formula:
frequency = (rate/count) cycles per second
Using This FunctionWFM_Op initiates a waveform generation operation. NI-DAQ writes the data in the buffer to the specified analog output channels at a rate as close to the rate you want as the specified rate hardware permits (see WFM_Rate for a further explanation). With the exception of indefinite waveform generation, WFM_Op waits until NI-DAQ completes the waveform generation is complete before returning (that is, it is synchronous).If you have changed the analog output configuration from the defaults by changing the jumpers on the device, you must call AO_Configure to set the software copies of the settings prior to calling WFM_Op. NI-DAQ ignores the group settings made by calling WFM_Group_Setup when you call WFM_Op and the settings are not changed after NI-DAQ executes you execute WFM_Op.
For Lab and 1200 Series analog output devices, if the rate is smaller than 15.26 pts/s and counter B0 is busy in a data acquisition or counting operation, waveform generation cannot proceed.
WFM_OP uses either the default gating mode (none) or the gating mode you specify through the CTR_Config function. You need to connect your trigger signal to the gate pin on the I/O connector. Refer to the CTR_Config function description for details.
On E Series and 671X devices, you can externally trigger a waveform generation operation in a variety of ways. Refer to the Select_Signal function for more details.
The DSA devices use 32-bit data buffers. If you are using C or Delphi, you need to typecast your i32 array to i16 when you call WFM_Op. If you are using Visual Basic, you should use the nidaqr32.bas file (instead of nidaq32.bas) to relax type checking on buffer. The DSA devices use the upper 18 bits of each buffer element. The lower 14 bits are ignored and you should set them to 0. You can move each data point into the upper 18 bits with a left shift operation by multiplying it by 16,384.
Format
status = DIG_Block_PG_Config (deviceNumber, group, config, reqSource, timebase, reqInterval, externalGate)
PurposeEnables or disables the pattern generation mode of buffered digital I/O. When pattern generation is enabled, this function also determines the source of the request signals and, if these are internal, the signal rate and gating mode.
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
group |
i16 |
group |
config |
i16 |
enables or disables pattern generation |
reqSource |
i16 |
source of the request signals |
timebase |
i16 |
timebase value |
reqInterval |
u16 |
number of timebase units between request signals |
externalGate |
i16 |
enables or disables external gating |
Parameter Discussion
group is the group for which pattern generation is to be enabled or disabled.
Range:
1 or 2.
config is a flag that enables or disables pattern generation.
0: Disable pattern generation.
1: Enable pattern generation using request-edge latching output (input always uses request-edge latching).
2: Enable pattern generation without request-edge latching (input always uses request-edge latching).
reqSource
0: Internal. The board generates requests internally from onboard counters.
1: External. The board accepts requests from the REQ pin on the I/O connector.
2: Change detection (DIO 6533 (DIO-32HS) input groups only). The board generates an internal request whenever it detects a change on a significant input pin.
When using internally generated requests (reqSource 0 or 2), the REQ signal is an output; do not drive any external signal onto the REQ pin of the I/O connector. NI-DAQ considers all of the group’s lines significant for change detection by default. However, you can set a mask specifying that only certain lines should be compared. The same lines that are significant for pattern detection, if used, are also significant for change detection. If you are using pattern-detection messaging (DAQEvent 7 or 8), use the DAQTrigVal0 parameter of the Config_DAQ_Event_Message function to set the pattern-and-change-detection mask. Otherwise, use the line-mask parameter of the DIG_Trigger_Config function. When using the DIG_Trigger_Config function to set a line mask, you do not need to select any particular start trigger, stop trigger, or search pattern.
timebase determines the amount of time that elapses during a single reqInterval. The following values are possible for timebase:
–3: 50 ns (DIO 6533 [DIO-32HS] only).
1: 1 µs.
2: 10 µs.
3: 100 µs.
4: 1 ms.
5: 10 ms.
reqInterval is a count of the number of timebase units of time that elapses between internally produced request signals.
Range:
2 through 65,535.
externalGate is an absolute parameter and should be set to 0. The AT-DIO-32F does support external gating but this simply requires making a connection at the I/O connector. If you use external gating for group 1, the signal connected to IN1 gates the pattern. If you use external gating for group 2, the signal connected to IN2 gates the pattern. For an AT-DIO-32F, the signal at INx must be high to enable the pattern. The DIO 6533 (DIO-32HS) devices use triggering instead of gating; for more information, refer to the DIG_Trigger_Config function.
Using This Function|DIG_Block_PG_Config enables or disables the pattern generation mode of digital I/O. If the config parameter equals 1 or 2, any subsequent DIG_Block_In or DIG_Block_Out call initiates a pattern generation operation. Pattern generation differs from handshaking I/O in that NI-DAQ produces the request signals at regularly clocked intervals. If reqSource equals 0, the timebase parameter equals 2, and the reqInterval parameter equals 10, NI-DAQ reads a new pattern from or writes a pattern to a group every 100 µs.
DIG_Block_PG_Config enables or disables the pattern generation mode of digital I/O. If the config parameter equals 1 or 2, any subsequent DIG_Block_In or DIG_Block_Out call initiates a pattern generation operation. Pattern generation mode overrides any two-way handshaking mode set by the DIG_Grp_Mode function.
The primary difference between pattern generation and two-way handshaking is that in pattern generation timing information travels in only one direction, over the REQ line. The board can generate request signals at regularly clocked intervals (internal mode), or you provide request signals to the board (external mode), or the board generates request signals whenever the input data changes (change detection). Either there is no return handshake on the ACK line (DIO 6533), or the return handshake can be ignored (DIO-32F).
On the DIO 6533, pattern generation mode enables some additional features:
1. You can enable start and stop triggers using DIG_Trigger_Config.
2. NI-DAQ monitors the transfer speed, and the DIG_Block_Check function returns an error message if the system is unable to keep up with the programmed transfer rate (internal requests) or the rate of request pulses (external requests or pattern generation).
Only the DIO 6533 boards support change detection. In this mode, the board generates an internal request any time it detects activity on the group's significant input lines. As long as the rate of change is within the board's change-detection limits, the board captures exactly one copy of each new input pattern.
If you set a pattern mask for change detection, you can select a subset of the group's input lines to be significant. However, when the board detects a change, it acquires data from all of the group's input lines, whether masked or not.
Using change detection mode in conjunction with the Configure_DAQ_Event_Message function, you can also receive a message every time the input data changes. Use the Configure_DAQ_Event_Message function to generate a message after each pattern is acquired. To ensure best precision in messaging, use the interrupt-driven data transfer method. Otherwise, messages might be delayed. You can use the Set_DAQ_Device_Info function to select a transfer method.
On the DIO-32F, the advantage of using double-buffered output is that the variability in update intervals is reduced to an absolute minimum, producing the highest quality output at high update rates. The disadvantage is that the first ACK pulse produced by the device is not preceded by the first pattern. Instead, the second ACK pulse signals the generation of the first pattern. Also, the last pattern generated is not followed by an ACK pulse. The advantage of single-buffered output is the elimination of these ACK pulse irregularities. The first ACK pulse signals generation of the first pattern and the last pattern is followed by a final ACK pulse. The disadvantage of single-buffered output is that at high update rates, variations in DMA bus arbitration times can increase the variability in update intervals, reducing the overall quality of the digital patterns.
On the DIO 6533 (DIO-32HS), output is always double-buffered, thus minimizing the variability in update intervals. In addition, the ACK pulse irregularities are not present. Therefore, values 1 and 2 for the config parameter are equivalent for the DIO 6533.
Format
status = DIG_Trigger_Config (deviceNumber, group, startTrig, startPol, stopTrig, stopPol, ptsAfterStopTrig, pattern, patternMask)
Purpose
Sets up trigger configuration for subsequent buffered digital operations with pattern generation mode only (either internal or external requests).
Input Parameters
Name |
Type |
Description |
deviceNumber |
i16 |
assigned by configuration utility |
group |
i16 |
group |
startTrig |
i16 |
source of start trigger |
startPol |
i16 |
polarity of start trigger |
stopTrig |
i16 |
source of stop trigger |
stopPol |
i16 |
polarity of stop trigger |
ptsAfterStopTrig |
u32 |
number of points to acquire after the trigger |
pattern |
u32 |
data pattern on which to trigger |
lineMask |
u32 |
mask selecting bits to be compared for pattern or change detection |
Parameter Discussion
startTrig specifies the source of the start trigger.
0: Software start trigger.
1: Hardware trigger.
2: Digital pattern trigger (input group only).
startPol specifies the polarity of the start trigger.
0: Active high.
1: Active low.
2: Pattern matched.
3: Pattern not matched.
stopTrig specifies the source of the stop trigger.
0: None.
1: Hardware trigger.
2: Digital pattern trigger (input group only).
stopPol specifies the polarity of the stop trigger.
0: Active high.
1: Active low.
2: Pattern matched.
3: Pattern not matched.
ptsAfterStopTrig is the number of data points to acquire following the trigger. This parameter is valid only if stopTrig is not 0. If stopTrig is 2, this number will include the matching pattern.
Range:
2 through count, where count is the value of the count parameter in the DIG_Block_* functions.
pattern is the digital pattern to be used as a trigger point. This parameter is used only when either startTrig or stopTrig is 2.
lineMask selects the individual data lines to be compared when startTrig or stopTrig is 2 or 3 or when you enable change detection, using DIG_Block_PG_Config. This parameter allows you to set all the DONT_CARE bits in the pattern. A 0 means DONT_CARE, but a 1 is significant.
Using This FunctionIf startTrig is 0, a digital block operation begins as soon as you call a DIG_Block_* function. If startTrig is 1, a digital block operation does not begin until NI-DAQ receives an external trigger pulse on the group’s ACK (STARTTRIG) pin.
If stopTrig is 0, a digital block operation ends as soon as the operation reaches the end of the buffer (unless you enable double buffering with the DIG_DB_Config function). If stopTrig is 1, a digital block operation continues in a cyclical mode until NI-DAQ receives an external trigger pulse on the group’s STOPTRIG pin, at which time NI-DAQ acquires an additional number of data points specified by ptsAfterStopTrig before terminating the operation. The DIG_Block_Check function rearranges the data into chronological order (from oldest to newest).
If startTrig or stopTrig is 2 or 3, the board compares incoming data to the specified pattern. The DIO 6533 contains a single pattern-detection circuit per group. Therefore, you cannot set both startTrig and stopTrig to 2 or 3. You also cannot set startTrig or stopTrig to 2 or 3 and also configure a pattern-detection message (DAQEvent = 7 or 8) using Config_DAQ_Event_Message.
If startTrig or stopTrig is 2, the operation starts or stops when the incoming data matches the pattern on all bits declared significant by lineMask. If startTrig or stopTrig is 3, the operation starts or stops when the incoming data ceases to match the pattern on all bits declared significant by lineMask. The lineMask also controls which bits are significant for change detection, if used. See DIG_Block_PG_Config for information about change detection.
Bits that are significant for one purpose are significant for all purposes. If you configure both change detection and a start or stop trigger, the same lineMask applies to both. If you configure both change detection and a pattern-detection message using Config_DAQ_Event_Message, use DAQTrigVal0 instead of lineMask to control which bits are significant.